This invention generally relates to the field of electrostatic discharge (ESD) protection circuitry and, more specifically, improvements for silicon controlled rectifier (SCR) structures in the protection circuitry of an integrated circuit (IC).
Integrated circuits (IC""s) and other semiconductor devices are extremely sensitive to the high voltages that may be generated by contact with an electrostatic discharge (ESD) event. As such, ESD protection circuitry is essential for integrated circuits. An ESD event commonly results from the discharge of a high voltage potential (typically, several kilovolts) and leads to pulses of high current (a few amperes) of a short duration (typically, 100 nanoseconds). An ESD event is generated within an IC, illustratively, by human contact with the leads of the IC or by electrically charged machinery being discharged in other leads of an IC. During installation of integrated circuits into products, these electrostatic discharges may destroy the IC""s and thus require expensive repairs on the products, which could have been avoided by providing a mechanism for dissipation of the electrostatic discharge to which the IC may have been subjected.
FIG. 1 depicts a schematic diagram of a prior art multi-fingered SCR ESD protection device 101, which serves as protection circuitry for an integrated circuit (IC) 100. As the distances between the pads (i.e., pad pitches) become smaller the ESD protection circuitry has been provided with multiple SCR fingers. An illustrative prior art integrated circuit 100 includes a SCR protection circuit 101 having multiple SCR fingers, and is illustratively depicted in FIG. 1 having two SCR xe2x80x9cfingersxe2x80x9d 1021 and 1022. Generally, prior to an ESD event, the SCR fingers are in a nonconductive state. Once the high voltage of an ESD event is encountered, the SCR fingers then change to a conductive state to shunt the current to ground. Each of the SCR fingers maintains this conductive state until the voltage is discharged to a safe level.
In particular, the SCR protection circuit 101 is connected from a pad 132 to ground 124. The pad 132 is also connected to the protected circuitry of the IC, optionally through a current limiting resistor RL (not shown). The SCR protection circuit 101 comprises a trigger device 105 (discussed further below), a first SCR 1021 (i.e., xe2x80x9cfirst fingerxe2x80x9d), and a second SCR 1022 (i.e., xe2x80x9csecond fingerxe2x80x9d). The first SCR 1021 further comprises a NPN transistor QN11311 and a PNP transistor QP11321. In particular, the SCR protection device 101 includes an anode 122, which is connected to the pad 132 and to one side of a resistor Rn1 142. The resistor Rn1 142 represents the resistance of the N-well, which is seen at the base of the PNP transistor QP11321 of the SCR 1021, which is discussed in further detail below. Additionally, the anode 122 is coupled to an emitter 1081 of the PNP transistor QP11321, which is parallel to the N-well resistance Rn1 1421.
A first node 1341 includes the base of the PNP transistor QP11321, the other side of the resistor Rn1 1421, and the collector 1041 of the NPN transistor QN11311. A second node 1361 includes the collector 1061 of the PNP transistor QP11321, the base of the NPN transistor QN11311, and connects to one side of a resistor Rp1 1411. The resistor Rp1 141 represents the resistance of the P-well, which is seen at the base of the NPN transistor QN1 of the SCR 1021 and is discussed in further detail below. The other side of resistor Rp1 1411 is connected to a third node 124, which is grounded and serves as the cathode of the SCR 1021. Furthermore, the emitter 1121 of the NPN transistor QN11311 is also connected to the grounded third node 124.
A second SCR 1022 is formed exactly in the same manner as described with regard to the first SCR 1021. In particular, an emitter 1082 of a second PNP transistor QP21322 is coupled to the anode 122, which is common to all of the multi-finger SCR""s 102 and the pad 132. Furthermore, an emitter 1122 of a second NPN transistor QN21312 is coupled to the cathode 124, which is common to all of the multi-finger SCR""s 102 and ground. In addition, the two fingers 1021 and 1022 of the multi-finger SCR protection circuit 101 are coupled together by a common P-substrate and shared N-well regions therein. That is, the bases of the first and second NPN transistors QN11311 and QN21312 are coupled via a P-well coupling resistance Rpc 103p. Similarly, the bases of the first and second PNP transistors QP11321 and QP21322 are coupled via a N-well coupling resistance Rnc 103n. The coupling resistances Rpc and Rnc typically have high resistance values in the range of 100 to 2000 Ohms.
A single triggering device providing a positive trigger current to the trigger gate 105 has been used to turn on all of the SCR fingers 102. Alternatively, a single trigger device providing a negative trigger current to the trigger gate 107 may be used. It has been observed however, that providing the trigger current to the trigger gate 105 (or 107) has not been sufficient to trigger all of the SCR fingers 102 as is discussed below.
In operation, each protective multi-finger SCR circuit 102, which illustratively comprise the NPN and PNP transistors QN11311 and QP11321, will not conduct current between the anode 122 and the grounded cathode 124. That is, the SCR fingers 102 are turned off, since there is no high voltage (e.g., ESD voltage) applied to the SCR 102, but only the regular signal voltage of the functional parts of the IC. Once an ESD event occurs at the pad 132, a high voltage potential appears on the anode 122. A triggering device senses the high voltage potential and provides a trigger current to the trigger gate 105 and causes the base potential of the NPN transistor QN11311 to rise, which subsequently turns on the NPN transistor QN11311. Furthermore, the collector of the NPN transistor QN11311 is coupled to the base of the PNP transistor QP11321, which turns on the PNP transistor QP11321.
As such, once the NPN transistor QN11311 is turned on, the collector 1041 provides the base current to the PNP transistor QP11321. Therefore, the base current of the PNP transistor QN21321 is greater than the base current of the NPN transistor QN11311. Moreover, the current gain of the PNP transistor QP11321 is realized as the QP11321 collector current, which is then fed back to the base of the NPN transistor QN11311, thereby amplifying the base current of the NPN transistor QN11311. Amplification of the base currents in the SCR 102 progressively continues to increase in a feedback loop between both transistors QN11311 and QP11321. Therefore, the conduction in a turned on SCR is also called a xe2x80x9cregenerative processxe2x80x9d.
The SCR 1021 becomes highly conductive and sustains (i.e., holds) the current flow with a very small voltage drop (i.e., holding voltage) between the anode and cathode (typically, 1-2 V). Accordingly, once the SCR 1021 is turned on, the current from the ESD event passes from anode 122 to the grounded cathode 124. Once the ESD event has been discharged from the anode 122 to the cathode 124, the SCR 102 turns off because it cannot sustain its regenerative conduction mode.
There is usually a large voltage difference between the triggering point and holding point. One problem that has been observed is that the multiple SCR fingers 102 do not always trigger. That is, even though the first SCR finger 1021 may trigger, the other SCR fingers (e.g., SCR 1022) may not trigger because almost the entire triggering voltage quickly collapses, which fails to enable the other SCR fingers (e.g., SCR 1022) to reach their trigger voltages. Also the coupling through the relatively high-ohmic resistors Rnc and Rpc is too weak to turn on the other finger(s). In particular, a typical triggering voltage (depending on a trigger device connected to the trigger gate) is in a range of 7-10 volts, while the holding voltage for an SCR is in a range of 1 to 2 volts. If the first SCR finger 1021 triggers at 7-10 volts and then drops to the holding voltage of 1 to 2 volts, then there is not enough voltage to trigger the other SCR fingers 102. Thus, when the SCR fingers 102 carry large ESD currents, the voltage differences may lead to non-uniform current distribution and premature failure of the SCR fingers 102 and, ultimately, the IC 100 itself.
Such failure to trigger all of the multiple SCR fingers in an ESD protection device is especially prominent in epitaxial technologies. Specifically, wafers with an epitaxially grown layer of low-doped p material have a very low substrate resistance due to the high-doped p-region underneath the p-epitaxial layer. The objective of epitaxial wafers is to have exceptionally good coupling of the substrate to the ground potential. However, the low substrate resistance makes the triggering of the SCR fingers in an ESD protection circuit difficult. The very good coupling of the substrate to the ground potential impedes the current to flow to the other SCR fingers 102, such that only the first SCR finger 1021 will trigger, which may result in the remaining portion of the protection circuit 101 from not protecting the IC 100.
Therefore, there is a need in the art for a multi-fingered SCR protection device having a reliable triggering mechanism.
The disadvantages heretofore associated with the prior art are overcome by the present invention of an electrostatic discharge (ESD) protection circuit including a silicon controlled rectifier (SCR) having a plurality of SCR fingers. Each SCR finger includes at least one interspersed high-doped first region formed within a first lightly doped region.
At least one interspersed high-doped second region are formed within a second lightly doped region, where the first and second lightly doped regions are adjacent one another. At least one first trigger-tap is coupled to the second lightly doped region. Additionally, at least one first low-ohmic connection is respectively coupled between the at least one first trigger tap of each SCR finger.